21 #include <vlutil/vlPerformanceStats.h>
28 class DtSimEntryObjectAgent;
32 class DtVrlinkConnection;
33 class DtAggregateExistenceListener;
34 class DtVrlinkAggregateStateListener;
42 class DtAggregateStateObjectAgent;
65 void postDrainInput();
81 DtAggregateStateObjectAgent& objectDriver,
bool forceUpdate =
false);
85 bool forceStatePropertyUpdate =
false);
87 virtual void postRemoteControllerInit();
88 virtual void cleanup();
92 static void postDrainInput(
void* usr);
97 virtual void slot_modelSetChanged();
123 void update(
double timeT);
144 typedef std::map<makVrv::DtSimEntryUpdater::UpdateRate,AggregateUpdaterGroup>
160 typedef boost::unordered_map<makVrv::DtUniqueID, DtVrlinkNetworkUpdateSimulatedAggregateState>
AggregateStates;
164 typedef std::map<std::string, std::pair<DtRwProperties*, int> >
BaseStateMap;
UUID is a unique ID wrapper class.
Definition: rwUUID.h:222
AggregateUpdateGroupMap myRefreshRateGroups
Definition: aggregateSimDataProcessor.h:156
Contains makVrv::DtSimDataProcessorInterface class.
Virtual base class.
Definition: DtVirtualBaseClass.h:19
#define VRF_PROTOCOL_EXPORT
Definition: vrfProtocol.h:24
DtAggregateStateObjectAgent * myObjectAgent
Definition: aggregateSimDataProcessor.h:128
UpdateRate
Definition: DtSimEntryUpdater.h:31
std::map< makVrv::DtUniqueID, DtUUID > myUUIDMap
Definition: aggregateSimDataProcessor.h:169
AggregateAgentMap myAggregateAgents
Definition: aggregateSimDataProcessor.h:155
std::map< makVrv::DtSimEntryUpdater::UpdateRate, AggregateUpdaterGroup > AggregateUpdateGroupMap
Definition: aggregateSimDataProcessor.h:145
DT_DLL_VRFGUICORE bool operator==(const std::vector< makArchives::DtEnvironmentRecord::DtElevationalConfigurationRecord > &lhs, const std::vector< makArchives::DtEnvironmentRecord::DtElevationalConfigurationRecord > &rhs)
DtAggregateStateObjectAgent * myAgent
Definition: aggregateSimDataProcessor.h:137
std::map< makVrv::DtUniqueID, bool > myNeedsForcedUpdate
Definition: aggregateSimDataProcessor.h:168
The protocol specific processor for Aggregate sim data.
Definition: aggregateSimDataProcessor.h:48
bool myReportUUIDChanges
Definition: aggregateSimDataProcessor.h:172
makVrv::DtSimEntryObjectAgent * mySimEntryAgent
Definition: aggregateSimDataProcessor.h:153
Definition: aggregateSimDataProcessor.h:108
makVrv::DtSignalConnectionManager myConnections
Definition: aggregateSimDataProcessor.h:148
DtVrfRemoteController * myRemoteController
Definition: aggregateSimDataProcessor.h:158
makVrv::DT_PROTOCOL_NAMESPACE::DtVrlinkConnection & mySimulation
Definition: aggregateSimDataProcessor.h:150
The main class for the remote control interface to VR-Forces.
Definition: vrfRemoteController.h:204
For performance reasons there are two kinds of aggregate state.
Definition: aggregateState.h:30
#define VRF_PROTOCOL_NAMESPACE
Definition: vrfDis.h:18
AggregateIdList myForceUpdateList
Definition: aggregateSimDataProcessor.h:157
makVrv::DtSimEntryUpdater::UpdateRate myRate
Definition: aggregateSimDataProcessor.h:138
makVrv::DT_PROTOCOL_NAMESPACE::DtVrlinkAggregateStateListener * myListener
Definition: aggregateSimDataProcessor.h:136
Class to manage disconnection of boost connections on deletion.
Definition: DtSignalConnectionManager.h:20
A class which represents the simulation the driver manages.
Definition: DtVrlinkConnection.h:42
DtBalanacedUpdater updates updatee classes at a desired rate in a fair (each instance gets the same n...
Definition: DtBalancedUpdater.h:26
std::map< std::string, std::pair< DtRwProperties *, int > > BaseStateMap
Local map copy of aggregate states to prevent need of getting lock.
Definition: aggregateSimDataProcessor.h:164
unsigned long long DtUniqueID
Definition: DtUniqueID.h:19
Methods a data processor needs to implement to be considered a data processor.
Definition: DtSimDataProcessorInterface.h:24
#define DT_PROTOCOL_NAMESPACE
Make VR-Vantage VRLink code export with library #ifdef DL_DLL_IGCONVRLINK #undef DL_DLL_IGCONVRLINK #...
Definition: export.h:32
Contains makVrv::DtSimEntryUpdater class.
DtAggregateExistenceListener class listens for the creation of aggregates and creates.
Definition: DtAggregateExistenceListener.h:54
Contains makVrv::DtBalancedUpdater class.
VR-Link Aggregate state listener.
Definition: DtVrlinkAggregateStateListener.h:31
makVrv::DT_PROTOCOL_NAMESPACE::DtVrlinkAggregateStateListener * myListener
Definition: aggregateSimDataProcessor.h:127
Base class to provide boost signal/slot management.
AggregateStates myAggregateStates
Definition: aggregateSimDataProcessor.h:161
bool myReportForceChanges
Definition: aggregateSimDataProcessor.h:173
std::map< makVrv::DtUniqueID, DtString > myExtendedLabels
Definition: aggregateSimDataProcessor.h:167
makVrv::DtBalancedUpdater< AggregateStateUpdater > AggregateUpdaterGroup
Definition: aggregateSimDataProcessor.h:143
std::set< makVrv::DtUniqueID > AggregateIdList
Definition: aggregateSimDataProcessor.h:132
std::string myLastMarkingText
Definition: aggregateSimDataProcessor.h:171
A list of properties.
Definition: rwProperties.h:126
boost::unordered_map< makVrv::DtUniqueID, DtVrlinkNetworkUpdateSimulatedAggregateState > AggregateStates
Definition: aggregateSimDataProcessor.h:160
makVrv::DT_PROTOCOL_NAMESPACE::DtAggregateExistenceListener & myListener
Definition: aggregateSimDataProcessor.h:151
Definition: aggregateSimDataProcessor.h:176
DtTimedSection myTimer
Definition: aggregateSimDataProcessor.h:152
BaseStateMap myBaseStateMap
Definition: aggregateSimDataProcessor.h:165
std::map< makVrv::DtUniqueID, AggregateSimDataInstance > AggregateAgentMap
Definition: aggregateSimDataProcessor.h:141
DtAggregateSimDataProcessor * myProcessor
Definition: aggregateSimDataProcessor.h:129
Definition: aggregateSimDataProcessor.h:134